OPERATING MODES OF 8259A

1.Fully Nested Modes

.Default mode.

.IR0 has the highest priority and IR7 has the lowest one.

.If the ISR (in service) bit is set, all the same or lower priority interrupts are inhibited.

2.End Of Interrupt

.The ISR bit can be reset either with AEOI bit of ICW1 or by EOI command.

.Two types of EOI command;

a)Specific

b)Non-specific

.The non-specific EOI command automatically reset the highest ISR bit.

.When a mode that may disturb the fully nested structure, the specific EOI command is issued to reset a particular ISR bit.

.An ISR bit that is masked by the corresponding IMR bit, will not be cleared by a non-specific EOI , if it is in special mode.

3.Automatic Rotation

.Used in the applications where , all the interrupting devices are of equal priority.

.In this mode, an IR level receives lowest priority after it is served while the next device to be served gets the highest priority in sequence.

4.Automatic EOI Mode

.Till AEOI=1 in ICW4, 8259A operates in AEOI mode.

.The 8259A performs a non- specific EOI at the trailing edge of the last /INTA pulse automatically.

.AEOI should be used only when a nested multilevel interrupt structure is not required.

5.Specific Rotation

.A bottom priority level can be selected, using L2, L1 and L0 inOCW2 and R=1, SL=1,EOI=0.

.The selected bottom priority fixes other priorities.

6.Special Mask Mode

.When a mask bit is set in OCW, it inhibits further interrupts at that level and enables interrupt from other levels, which are not mastered.

7.Edge And Level Triggered Mode

.Decides whether the interrupt should be edge triggered or level triggered.

.If bit LTIM of ICW1=0, they are edge triggered, otherwise level triggered.

8.Readng 8259A Status

.Used to read the , status of the internal registers of 8259A.

.Reading is possible only in no polled mode.

.OCW3, is used to read IRR and ISR and OCW1 for IMR.

9.Poll command

.The INT output is neglected, though it functions normally by not connecting INT output or by masking INT input of the microprocessor.

.This mode is entered by setting p=1 in OCW3.

.A poll command may give more than 64 priority levels.

10.Special Fully Nested Mode

.Used in more complicated systems.

.Similar to, normal nested mode.

.When an interrupt request from a certain slave is in service, this slave can further send requests to the master.

.The master interrupts the CPU only.

11.Buffered Mode

.When the 8259A is used in the system in which bus driving buffers are used on the data buses, the problem of enabling the buffers arises.

.The 8259A sends a buffer enable signal on /SP//EN pin.

12.Cascade Mode

.The slave INT outputs are connected with master IR inputs. When a slave request line is activated and acknowledged, the master will enable the slave to release the vector addresses during the second pulses of /INTA sequence.

.The cascade lines are normally low and contain slave addresses codes from the trailing edge of the first /INTA pulse to the trailing edge of the second /INTA pulse.

Posted in: CS 506 Microprocessor Based System Design,Lecture Notes,Semester V